Digital Logic Design

Daffodil International University Faculty of Science & Information Technology Department of Computer Science & Engineering Midterm Examination, Fall 2026 Course Code: CSE 223, Course Title: Digital Logic Design Level: 2 Term: 3 Batch: 68 Time: 1:30 Hrs Marks: 25 Answer ALL Questions [The figures in the right margin indicate the full marks and corresponding course outcomes. All portions of each question must be answered sequentially.] 1. a) Show all necessary steps to convert (23122)4 to (?)6 and give the diminished-radix complement of the resulting number. [5] CO1 b) A combinational logic function is defined as F(A, B, C, D) = [(A + BD)' (A'C + D)]'. Draw the logic circuit using NOR gates only. Label the intermediate transformations required to implement the function and indicate the number of NOR gates used. Assume that only the uncomplemented input variables (A, B, C, D) are available. [5] 2. a) A four-variable Boolean function is given in standard SOP form: F(A, B, C, D) = A'B' + AC + BD'. Develop the given function into canonical SOP and canonical POS forms. Demonstrate the results using minterm and maxterm summation/product notation, respectively, showing the corresponding indices. [5] CO2 b) A Boolean function is given as A'B'D' + A'BD' + AB'C'D + ABD. The simplified expression obtained using a four-variable Karnaugh map is F(A, B, C, D) = A'D' + AD. Apply the Karnaugh map method to verify the given simplified expression and identify whether don't-care conditions are required. [5] 3. a) A digital processing unit is required to perform a three-variable binary arithmetic operation in which one binary variable is reduced by the other binary variable, accounting for any borrowing from the preceding lower-order stage. Only a decoder and basic logic gates are available for implementation. Explain how the circuit can be constructed analyzing the complete truth table with the corresponding Boolean expressions and drawing the complete logic circuit. [5] CO3